Search Results for "net-snmp-5.9.4-1.x64.exe"
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Showing 118 open source projects for "net-snmp-5.9.4-1.x64.exe"
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SPI via FTDI
Control electronic devices using most popular protocols.
Application allows make connection to electronic devices using popular interfaces (SPI, I2C, 1-Wire, uWire, UART) and control them trough FTDI ICs (FT2232D, FT2232H, FT4232H, FT232H etc). The title was formed historically and no longer reflects the functionality of the app. This software works in Windows 7-11 with .NET 4.5. -
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VeroRoute
Qt based Veroboard, Perfboard, and PCB layout and routing application
Cross-platform software for producing Veroboard (stripboard), Perfboard, and 1-layer or 2-layer PCB layouts. Automatically prevents short-circuits and checks for open-circuits. Pre-compiled versions available for MS Windows and 64-bit Linux Mint 20.3 (should also run on other 64-bit Linux systems that are based on Debian and support Qt version >= 5.12.8). Android APK available (tested on Android 7 and Android 10) and requires device resolution of at least 1280x800. -
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BuddyCAD
A set of freeware applications for viewing/processing P-CAD files.
BuddyCAD Viewer+ can view/process files for following P-CAD versions: - P-CAD v4.5 - P-CAD v8.5 / v8.7 / v9.0 - P-CAD 99 / Accel / 2002 / 2004 / 2006 (through ASCII import) -
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Baya - SoC Integration Platform
Best in class SoC Integration Platform, IP-XACT, Verilog VHDL, UPF
1. Comes with 200+ high level Tcl commands around SoC platform assembly 2. Easy to start - use the verilog2baya tool to convert existing SoC/SS into Baya 3. Adhoc and Interface based connections 4. Autoconnections 5. Rule based connections between component ports 6. A variety of SoC integration Methodologies 6.a. XLS/CSV Based connections 6.b. -
The AI-powered unified PSA-RMM platform for modern MSPs.SuperOps.ai is the only PSA-RMM platform powered by intelligent automation and thoughtfully crafted for the new-age MSP. The platform also helps MSPs manage their projects, clients, and IT documents from a single place.
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IP-XACT 2009/2014 Platform
Smart GUI/Commandline tools to create IP-XACT( 2009/2014) files
Smart GUI to create or update IP-XACT often needed for the IP packaging. It has capability create Bus Definitions from scratch to populate BusDef library. One can create IP-XACT Component, Design or Registers by importing Ip in System Verilog/Verilog-95/VHDL, instantiate Bus Interfaces with proper port maps and attributes as needed. Smart GUI to create IP-XACT Registers, Memory Maps, Address Blocks for IP- has feature to import XLS or Verilog . It has Tcl/Python API support. ipxact2verilog - Generate Verilog module from IP-XACT definition ipxact2vhdlentity - Generate VHDL entity from IP-XACT Component definition verilog2ipxact - Generates IP-XACT definition from Verilog modules vhdl2ipxact - Generates IP-XACT definition from VHDL source ipxactcoherencycheckerverilog / ipxactcoherencycheckervhdl - Validates IP-XACT Component definition with RTL validateipxact - IP-XACT Linting tool -
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jCLS
The Component Library Sorcerer
WARNING: This project is under hard development and not intended for productive use yet but only for discussion. jCLS helps to create and maintain fine detailed component libraries for EDA tools like Altium Designer. It provides tools for data generation for masses of single parts from only the most necessary informations. Having good maintained and rich described and voluptuous detailed component libraries needs normally masses of time, work and discipline. jCLS comes here to save you... -
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1. flattenverilog : Flattens the specified verilog module by removing the hierarchies. It works both for RTL and netlist. 2. preprocessverilog : Verilog Preprocessor to resolve macros like nested `ifdef , `define 3. createhierarchy : Verilog Hierarchy Creation Tool to group a list of instances in RTL or enlist. This creates a new wrapper by encapsulating the instance 4. flatteninstances : Flattens the given list of hierarchical instances- this removes hierarchy by pulling the contents in the higher leve 5. removehierarchy : Verilog Hierarchy Removal Tool to ungroup all the instances in a given module 6. comparemoduleinterfaces - Diff module ports and parameter. ...
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Proximus for Ryzen AI
Runtime extension of Proximus enabling Deployment on AMD Ryzen™ AI
This project extends the Proximus development environment to support deployment of AI workloads on next-generation AMD Ryzen™ AI processors, such as the Ryzen™ AI 7 PRO 7840U featured in the Lenovo ThinkPad T14s Gen 4 ,one of the first true AI PCs with an onboard Neural Processing Unit (NPU) capable of 16 TOPS (trillion operations per second). Originally designed for use with Windows 11 Pro, this runtime was further enhanced to work under Linux environments, allowing developers and researchers to fully utilize the AMD AI Engine across both platforms. ... -
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ePnR
ePnR is an IC block standard cell placement & routing tool
ePnR is a simple Integrated Circuit (IC) block standard cell placement & routing tool. ePnR currently supports only circuit blocks using equal height standard cells arranged in one or more channels of user configurable length. Standard cells are described in a simple text based library (compliant with eLogSim). Placement follows initially the cell call order in the SPICE like circuit input netlist. However, a placement optimization, aiming at minimum weighted accumulated wire length, by simulated annealing is available. ... -
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...It supports standard and custom symbol libraries. It supports PCB layout programs with several netlist formats and can also produce SPICE simulation netlists. It is also often used to draw one-line diagrams, block diagrams, and presentation drawings. The source code for TinyCAD is now on GitHub: https://github.com/matt123p/TinyCAD Online documentation can be found here: https://github.com/matt123p/TinyCAD/wiki
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eLogSim
Digital circuit simulator
eLogSim is an event driven, 4-level (0,X,1,Z) digital circuit simulator. It uses a test oriented stimulus approach and offers a statistical (or exhaustive if it makes sense) fault simulation option. eLogSim has a simple GUI and is pre-compiled for Ubuntu 20, Mint 20, CentOS 8, openSUSE 15, FreeBSD 12, Solaris 11, Windows 10/11 & Raspbian/Raspberry PiOS Buster (32/64bit) & Ubuntu-MATE 20.04 (64 bit) operating systems. -
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yad2xx
Yet Another JNI-D2XX Interface Project
A Java Native Interface (JNI) library suitable for communicating with a range of USB interface chips from FTDI via the D2XX driver. It currently supports OS X 10.10+ and Windows 7/8 x64. On OS X, the 64 bit JVM is supported. On Windows, support is limited to the 64 bit JVM (Java 1.8 is now 64 bit). Version 1.0 --------------------------------- - Java 8 - SPI support and sample (via MPSSE) -
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Electronic Circuit Optimization
Optimer: a SPICE base electrical/ electronic circuit optimization tool
This project is dedicated to the optimization of (any) electrical and electronic circuits and components using evolutionary and heuristic algorithms incorporated with SPICE simulators (such as HSPICE, ngSPICE, etc.). We provide Optimer, which is a user graphical interface for circuit design and optimization. Website: https://www.circuitoptimization.com/ E-mail: contact@circuitoptimization.com/ -
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Mod Direct Panoramic Spectrum Analyzer
Mod Direct Panoramic Spectrum Analyzer
1. Added the ability to directly work with the chip (parameter "settings.ini" - Direct=1). 2. The possibility of cyclic writing/recording from realtime to a file and subsequent playback from it is added (double click of the left mouse button anywhere in the top spectrogram). The size of the MB file is specified in the settings file (Cyclic file size=100). -
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Penthode
Penthode simulates, draw and plot electrical power distributions
Given a simple net-list describing the high level power architecture of your system Penthode: - simulates the voltage and current from device turn on to the steady state. - highlights components working out of specification - draws a nice power tree diagram showing the currents/powers balance - plots node transient voltage and gate current waveforms It is possible to change component parameters interactively to improve the design -
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Kicad shematic library manager
Kicad shematic library manager
...With this manager new schematic symbols can be created and or modified using spread sheet. The informations of component as description, documentation etc. can be modified as well. This manager enables moving components from one library to another one. The project source sode is hosted on: https://github.com/Filip83/kicad-lib-utils -
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SOCGEN is a collection of tools that will help create digital components/ip_cores and then integrate them into a "System on a Chip"(SOC) for use in ASIC or FPGA designs.
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Control Techniques Software
CT Soft is software designed to be used with Control Techniques Drives
...Internet Explorer V5 or later should also be installed Absolute minimum of 800x600 screen resolution. 1024x768 is recommended as a minimum. Adobe Acrobat 5.05 or later (for parameter help) 256MB RAM Microsoft .NET Framework Version 2.0 Note that you must have administrator rights to install CTSoft If you have a previous copy of CTSoft installed you must uninstall it first. -
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dxf2pcb
Convert DXF drawings of circuit boards to gEDA-PCB files.
This Python script reads in a DXF (ascii) file and generates a PCB output compatible with PCB Designer, part of the gEDA suite. It is designed for two purposes: One is to generate a PCB snippet from a mechanical drawing (such as a board outline), the other is to produce element files from CAD drawings. PCB snippets are easily imported into an existing gEDA-PCB project using File -> Load Layout to Buffer. Generated element files are ready to use (except for special cases like no-paste flags and rounded pads). -
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Current work at: https://github.com/jcampos73/DraftCable WARNING: version 1.0.94 previous to 2016-01-22 has a BUG! Download again! Min. Req: Win XP SP3 If you get missing mfc120.dll install vcredist_x86.exe at prog folder CAD design tool for electrical and block diagrams with net list compilation. Tool for creating new parts included. DO NOT lose time copy and pasting cable datasheet. This program, unlike MS Visio or other generic tools, has specific business funcionalities like: 1.- You can double-click a cable in the diagram and define the wiring of that cable in a pop-up dialog. 2.- Also the parts have properties that define all the connector Jacks / Plugs (J/P) they have (e.g., J1 or P1 would appear at the part). 3.- Rack lay out tool. ...
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Educational software for designing and simulating logic circuits, with intuitive GUI, hierarchical circuits and multi bit buses, oscilloscope, and navigate running circuits hierarchy. Please visit project's web site at: http://www.LogicCircuit.org
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STANTOR
Scada for Home Automation
Stantor is a SCADA for home automation/domotic project. It drives : k8061-K8055(USB), K8000(I2C), Arduino Mega and Uno, X10, 1-Wire, electricity meters, Webcam (motion), infrared remote controls. It uses WEB browser, smartphone, xHTML, SOAP, Websocket, HTML5 Apache, mySQL, PHP, javascript and Ajax. Stantor allows control of electrical equipments like boilers, shutters, lamps, pumps, etc...connected to the 220V/110 VAC. Gathering information of various kinds such as temperature, light, switches, position sensors is provided by Stantor permanently in real time. ... -
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Electronic Component API
Search electronic components, datasheets, stock, price, alternatives
...It allows the user to query the Ciiva Cloud Database for component information in a variety of ways, including searching via description or part number. Queries to the Ciiva API return one or more data objects which contain information on manufacturer and supplier components, such as lifecycle, compliance, pricing, availability, substitutes/alternatives, datasheets, and more. -
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This is a collection of (hopefully) useful productivity enhancements of Mentor Graphics IC-Station tools
