Search Results for "/storage/emulated/0/android/data/net.sourceforge.uiq3.fx603p/files"
Sort By:
Showing 7 open source projects for "/storage/emulated/0/android/data/net.sourceforge.uiq3.fx603p/files"
View related business solutions-
EasySend is a no-code platform that transforms customer journeysEvolve forms into smart, AI-powered digital workflows that streamline your data intake and elevate customer experiences.
-
Optimize every aspect of hiring with Greenhouse RecruitingWhat’s next for many of us is changing. Your company’s ability to hire great talent is as important as ever – so you’ll be ready for whatever’s ahead. Whether you need to scale your team quickly or improve your hiring process, Greenhouse gives you the right technology, know-how and support to take on what’s next.
-
1
GHDL
VHDL 2008/93/87 simulator
This directory contains the sources of GHDL, the open-source analyzer, compiler, simulator and (experimental) synthesizer for VHDL, a Hardware Description Language (HDL). GHDL is not an interpreter: it allows you to analyze and elaborate sources for generating machine code from your design. Native program execution is the only way for high-speed simulation. Full support for the 1987, 1993, 2002 versions of the IEEE 1076 VHDL standard, and partial for the 2008 and 2019 revisions. By using a... -
2
CoreTML framework is an open-source template-based configuration system allowing the developer to create parametrized templates by inserting special content to any text files. Its main purpose is to serve as a toolkit for semiconductor IP core creation (based on VHDL/Verilog).
-
3
MatlabSimulink2CPP
Demo of Simulink to C++ C or HDL FGA for HFT potential
Video and files download for Visual trading idea to C++ or FPGA HFT Meetup File download sample: test model (Matlab 2014b with Visual Studio 2013 C++ project generated) Powerpoint MATLAB SIMULINK http://quantlabs.net/blog/2015/04/video-and-files-download-for-visual-trading-idea-to-c-or-fpga-hft-meetup/ -
4
Application de fines templates of VHDL structures, which allows us comfortly generate most used VHDL structures. It can also work with VHDL testbench templates from which can be created VHDL testbenches of existing projects.
-
Project Planning and Management Software | PlanviewPlanview® ProjectAdvantage (formerly Sciforma) is an enterprise-centric project and portfolio management (PPM) software designed to enable change, drive innovation, and lead in a company's digital transformation. With ProjectAdvantage, teams can strategically track and monitor project data in order to make relevant decisions. It offers multiple features focused on strategic management, functional management, and execution management. A highly scalable and cost-effective solution, ProjectAdvantage is available in various deployment models.
-
5
This is an image coder with fixed sampling, at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with res. up to 352x288).
-
6
the goal of this project is to build a stack for Lonworks Protocol and device working on this protocol
-
7
...The OS is to run on a VHDL chip OpenHardware design called the Minon, but could become available for other platforms. The unique point of the design is a revolutionary data compression technology.
- Previous
- You're on page 1
- Next
