vMAGIC 0.3.9 released

2010-08-18T11:10:28Z

Hi folks!
We are proud to announce version 0.3.9 of the vMAGIC libraries with a number of improvements. Most importantly, this will be the last alpha release as we want to keep the API stable from beta release 0.4.0 onwards.
The current release particularly improves the handling of scopes, thus extending the code analysis features of vMAGIC. Also we have re-added the documentation to the binary release, and introduced a complete overhaul of the output framework. This last item is as yet transparent to the user, but it will be very important for the extension of the vMAGIC output options, i.e., the generation of XML code or Java code using vMAGIC (cf. http://vmagic.sf.net > Coming up next).
Looking forward to your feedback on http://sourceforge.net/projects/vmagic/forums/forum/880445
Ralf and christopher

vMAGIC 0.3.2 released

2010-02-18T10:19:32Z

The vMAGICParser has been tested against the VESTs VHDL test suite with good results (99.59% correct), with 11 errors, most of which are not true VHDL errors but a problem of our comparison techniques. Anyhow this should make you rather confident that whatever you want to parse with vMAGIC will work correctly.
Coming up next is an update on examples, both full scale applications and simple tests.

vMAGIC 0.3.0 released

2010-01-27T11:54:10Z

The new vMAGIC release includes a number of new features, such as a new type handling system, simplified expression building, customizable VHDL output, and (finally) support for several things that have so far been missing (like VHDL package building). Also, the new version uses much less memory and performance was dramatically improved. This of course implies some massive changes to the API, which now presents a much more consistent access to VHDL. We have split the package in two (vMAGICParser and vMAGIC) such that if you want to create stuff only, you don’t have to provide parser and ANTLR libs.
We are currently testing vMAGIC using formality, such that we can find bugs in the parser/writer combination. If you find any, please let us know via the SF forums. Demos and documentation are coming up; we’ll keep you posted on that!

New API coming up in 0.3

2009-06-19T14:53:35Z

We are working on a new API to make vMAGIC more user friendly and usable. Some of the things we are working on now are:

* Simplicity: The current version of vMAGIC uses abstractions of VHDL elements, which are, however, still very much inspired by their grammatical structure. The new version of vMAGIC will no longer refer to that structure; therefore we’ll be able to simplify a lot of operations on the code, e.g., expression building etc.

* Types and Literals: The type subsystem is being refurbished to support all possibilities of VHDL (like records and unconstrained arrays)

* Scopes: Instantiations of VHDL elements such as signals or components will be linked to their corresponding declarations by the parser/the API. Among others, this allows for refactoring operations such as renaming elements or adding/changing/removing items in one step in the whole design. When dealing with VHDL projects, this updating refers to the design hierarchy, such that operations like getting one signal from the bottom of the design hierarchy to the top (e.g., for monitoring purposes) becomes easy)

* Copying: One very convenient way of generating, i.e., a signal is copying. We will provide mechanisms for deep copies of signals, such that copies are completely independent of their origin

* Output: The VHDL writer will no longer use the StringTemplate libraries and therefore will no longer be limited by them. The new version will allow for changes in style attributes at runtime, like indentation, case, and ordering of the output.

* Modularization: The VHDL-parser and the VHDL-API will be in different packages, such that applications without the need to read VHDL code will have no dependencies on ANTLR3 libraries

* Verified: We are going to check the behavior of vMAGIC using Synopsys Formality, such that everybody can use the library without fear of messing up their code

* Smaller memory footprint: current measurements show us that the memory usage of our API shrinks approximately by a factor of 10 with increased performance. This is not a final value, as we haven't implemented everything yet.

Buf fix release 0.2.1

2009-06-19T14:51:37Z

This is a bug-fix summarizing all the work done on vMAGIC 0.2. As we are going to update the API in version 0.3.0 there will be no more releases in 0.2. Look out for news on the new API.

vMAGIC release 0.2.0

2009-01-05T10:39:49Z

The vMAGIC release 0.2.0 is all about comments: where comments in VHDL code (except vMAGIC-tags) were disregarded completely in former versions, comment handling has been improved very much since:

* Support for comments in the VHDL output, very helpfull for documentation of generated code and when reviewing generated code manually
* Comments in front of some VHDL elements are preserved from a parsed template to the VHDL output (e.g. in front of architectures, entities and processes)
* vMAGIC tags are now supported on an element level and not only per file as in previous versions. These tags are also preserved in the output. Using vMAGIC tags the user can specify additional information to be passed to a vMAGIC based application.

Demo applications for vMAGIC

2008-12-04T17:17:11Z

Hi everyone!
We have now released two demo applications to show the power of vMAGIC, the VHDL Manipulation and Generation Interface. They can be tested at http://wwwhni.uni-paderborn.de/sct/extern/vmagic/demo either as a Java Web Start program or as a Java program for manual download.
The first example creates a wrapper design, connecting your design's I/Os to a PLX9045 PCI bus bridge.
The second example creates a multiplexer based ROM, the contents is defined using a user defined JavaScript source.
Enjoy, the vMAGIC Team

vMAGIC 0.1.0 (alpha) released

2008-10-25T16:33:32Z

The vMAGIC library provides functionality for reading, manipulating and writing VHDL code (Very High Speed Integrated Circuit Description Language), enabling users to create their own code-generators, code-analyzers and more. Apart from a VHDL'93 compliant parser and writer, a high level programming model is provided: This model gives easy access to both high-level (registers, muxes,...) and low-level VHDL objects (declarations, assignments, assertions), resulting in a toolset for reliable and fast VHDL code generation.
Currently the project is in alpha phase, though it is rather stable. Please report any problems or errors that you find to the project forums.

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